Silicon Architect
Meta

Reality Labs (RL) focuses on delivering Meta's vision through AI-first devices that leverage Mixed Reality (MR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Mixed and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with highly integrated SoCs that leverage breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & MR devices that blend our real and virtual worlds throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.We are looking for a Silicon Architect who will collaborate with a world-class group of SoC and IP architects, modeling, development, and validation teams, firmware developers, and program managers to accelerate the development and market introduction of low power highly customized SoCs. The ideal candidate will understand the full spectrum of design choices associated with integrating low-power SoCs composed of heterogeneous subsystems, and the opportunities to harmonize their development around shared building blocks shaped to form a flexible chassis offering productivity and consistency.Successful candidates for this role will have an excellent grasp on SoC architecture and the key components used to integrate them such as NoCs, shared memory elements, clock generators, and power controllers, plus the performance characteristics of heterogeneous processing subsystems. They must be comfortable in operating in a cross-functional environment and demonstrate a hands-on approach to problem-solving.

Silicon Architect Responsibilities:

• Architecture definition and specification for improvements to the SoC and subsystem chassis architecture
• Specification for feature improvements to our chassis generators
• Work cross-functionally with SoC and IP architecture, performance/power modeling, logic design and verification, physical implementation, firmware, CAD, and prototyping teams
• Work effectively as an individual and in a multidisciplinary multisite team

Minimum Qualifications:

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• 10+ years of experience integrating SoCs or complex IP-based subsystems as a Silicon Architect or Digital Design Engineer
• Experience in evaluating trade-offs such as speed, performance, power, area
• Experience in employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary design issues
• Hands-on experience in digital design, logic simulation, and performance analysis

Preferred Qualifications:

• Experience deploying NoCs leveraging on-chip interface protocols such as AMBA AXI or OCP for heterogeneous SoCs targeting consumer or mobile devices
• Experience deploying caches and/or optimizing DRAM performance
• Experience deploying hardware controllers to manage multiple clock, power, and voltage domains for battery-operated systems
• Experience with scripting languages like Python to facilitate task automation
• Experience in SystemC/TLM2 performance modeling
• Experience implementing end-to-end Quality of Service for heterogeneous processing systems
• Experience with performance and power modeling of chip subsystems
• Experience collaborating and/or leading in a multisite team environment

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